Comparison of motherboards supporting the new memory standard PC2100 (DDR266)
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GeForce2 MX 200 and GeForce2 MX 400 - new chips from Nvidia
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How can you “burn out at work”
Having dealt with processor cooling issues, we can now easily figure out the question of why Duron processors burn up if they are turned on without a heatsink. Generally speaking,…

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The victory of the losers, or the story of the creation of FLASH memory (part4)

Our main goal was not to change anything during the production process, and to solve the problem of how to place electrons on a floating shutter. Initially, we abandoned the idea of ​​electron tunneling in favor of avalanche injection (hot electron injection).

Reference. Tunneling effect, tunneling – a quantum effect consisting in the penetration of a quantum particle through a region of space in which, according to the laws of classical physics, the particle is not allowed to be.
Injection of hot electrons is the process of transition of charged particles through an energy barrier formed by a thin dielectric due to an increase in their kinetic energy in the channel between the source and the drain in the cell.

This idea came to us in the course of work on reliability, since the tunneling process very quickly “wore out” the dielectric layer. It was then that I began to think about this issue. The first thing that came to mind was an avalanche breakdown, but, of course, exposing a 2K chip when recording an avalanche breakdown is not a good idea. Therefore, the idea came up to use the drain-source channel to provide avalanche injection of electrons and to give a charge to a floating gate. Thus, the problem of programming a future memory cell was solved and high reliability of data storage was achieved.

Reference. The first transistors with a floating gate were created on the basis of p-channel technology (holes are the main charge carriers with p-channel technology). The substrate is an n-type silicon wafer (the main charge carriers are electrons) with a resistivity of 4 … 8 Ohm x cm.

The floating shutter charge mechanism is based on the following effects. A negative potential is applied to the drain region of the p – channel MOS transistor (drain). As the negative bias increases, the depleted layer and the electric field in it grows. Under the action of an electric field in the depleted layer, minority carriers (electrons) from the sink p + region will drift to the n region of the substrate. With increasing field strength, the electron drift velocity increases, and at a certain critical value of the field strength, an avalanche process occurs. At the same time, due to capacitive coupling, a positive charge is induced on the floating gate, which forms an electric field directed from the floating gate to the drain.

Thus, the electric field of the reverse biased sink p – n junction forms a significant amount of high-energy (hot) electrons with sufficient energy reserves to overcome the potential barrier of a thin layer of a dielectric located under a floating gate. Having overcome it, the “hot electrons” flow onto the floating gate, since due to capacitive coupling there is a positive bias voltage attracting them. As the floating gate charges, a negative charge accumulates on it, which will create a field that impedes the charge process. In this case, the avalanche injection current through the dielectric will decrease and at a certain charge on the floating gate will decrease to zero.

After charging the floating gate with electrons, the transistor goes into the open state, i.e. stores a logical “0”.

The principle of operation of the device was as follows. To record information in the cells, it was necessary to select the desired address, and apply a high voltage to the transistors. This created an avalanche process of electron motion in the drain-source channel. In this case, the electrons receive enough energy to pass the insulating layer of the dielectric and accumulate on the floating gate. When the voltage is removed, the electrons are locked on the shutter. Thus, we were able to program the memory chip.

Reference. Reading data from such memory was carried out as follows. The choice of the necessary line in this device is carried out by applying a logical zero signal to the corresponding line. In this case, a logical “0” is supplied to the string Ai and opens the floating gate of the transistor VT1. If the floating gate of the transistor VT2 has a negative charge, then in this case, the transistor VT2 opens, and the flowing current will create a logical unit voltage on the resistor Rj. If there is no charge on the floating gate of the transistor VT2, then the transistor is closed, and a logical “0” voltage is present on the resistor Rj.

Scheme explaining the principle of reading data from a memory cell proposed by Frohman

The next problem was the erasure of information from memory cells. The first idea to erase information from memory cells that came to my mind was to use x-rays for this purpose. Everything is simple, you have electrons that are on a floating shutter. Using X-ray radiation, you give them energy and they transfer back to the substrate, thereby freeing the floating gate. This idea did not take root, for reasons of its simplicity, and at the same time because of the destruction of silicon by x-ray radiation.

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